1. Technical Field
Various embodiments relate to a semiconductor apparatus, and more particularly, to a semiconductor apparatus capable of wireless communication and a system including the same.
2. Description of Related Art
In a semiconductor system, a master device and a slave device communicate with each other through wires. The master device and the slave device have pads and communicate with each other through wires bonded to the pads.
Recently, there has been developed a three-dimensional (3D) semiconductor apparatus in which a plurality of chips are stacked to elevate the degree of integration of the semiconductor apparatus. The stacked chips can communicate with one another through wires or through electrodes such as a TSV (through-silicon via).
FIG. 1 is a structure diagram illustrating a stacked semiconductor device 10 in accordance with a conventional art.
Referring to FIG. 1, the stacked semiconductor device 10 includes a substrate 11, an interposer 12 and a plurality of chips 13 to 15.
A ball grid array 16 is disposed on a first side of the substrate 11. The substrate 11 can be electrically connected with external devices such as a host or a processor through the ball grid array 16.
A C4 bump 17 is disposed on a first side of the interposer 12 that is contacted to a second side of the substrate 11 through the C4 bump 17. The interposer 12 can be electrically connected with the substrate 11 through the C4 bump 17. A micro bump 18 is disposed on a second side of the interposer 12.
A through-silicon via 19 is formed inside each of the plurality of chips 13 to 15 and electrically connects each of the plurality of chips 13 to 15 to one another through the micro bump 18. A bottom chip 13 of the plurality of chips 13 to 15 is electrically connected with the interposer 12 through the micro bump 18 disposed on the interposer 12.
The stacked semiconductor device 10 described above forms electrical connection from the substrate 11 to the uppermost chip 15 of the plurality of chips 13 to 15.
The external devices have only way to access each of the plurality of chips 13 to 15 by transferring signals through the substrate 11 and thus do not have the other way to separately access the plurality of chips 13 to 15, especially after completion of packaging of the stacked semiconductor device 10.
Further, when the plurality of chips 13 to 15 are in a wafer level, it is hard to electrically access the plurality of chips 13 to 15 with a probe during test because the plurality of chips 13 to 15 use the micro bump 18.